Intel MCS 51 User Manual

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8XC51FXHARDWAREDESCRIPTION
Table 17. IE:Interrupt Enable Register
IE
Address= OA8H
ResetValue= 000000006
BitAddressable
I
EA EC ET2 ES ETl
EX1 ETo
Exo
Bit
7
6 5
4
3
2
1
0
EnableBit = 1enablestheinterrupt.
EnableBit = Odisablesit.
Svmbol Function
EA
EC
ET2
ES
ETl
Exl
HO
EXO
Globaldisablebit.IfEA = O,allInterruptsaredisabled.If EA= 1,eachInterruptcanbe
individuallyenabledor disabledbysettingorclearingitsenablebit.
PCAinterruptenablebit.
Timer
2 interrupt enable bit.
SerialPorfinterruptenablebit.
Timer1interruptenablebit.
Externalinterrupt1enablebit.
TimerOinterruptenablebit.
ExternalinterruptOenablebit.
Table 18. 1P:Interrupt PrioritYRe9isters
1P Address = OB8H
Reset Value = XOOOOOOOB
BitAddressable
—
PPC PT2 Ps
PTl
Pxl PTO Pxo
Bit
7
6
5
4
3
2
1
0
PriorityBit =
1
assigns highpriority
PriorityBit = Oassignslowpriority
Symbol
Function
—
Notimplemented,reservedforfutureuse.*
PPC
PCAinterruptprioritybit.
PT2 Timer2 interruptprioritybit.
Ps SerialPortinterruptprioritybit.
PT1
Timer 1 interrupt priority bit.
Pxl Externalinterrupt1prioritybit
PTO TimerOinterruptprioritybit.
Pxo ExternalinterruptOprioritybit.
NOTE:
●
User softwareshouldnotwrtteIs to reservedbits.These bitsmaybe usadinfuture8051 familyproductsto invoke
newfeatures.In thatcase, the reset or inactivevalueof the new bitwillba O,and itsactivevaluewillbe 1. The value
read
from a reservedbit is indeterminate.
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Intel MCS 51 Specifications

General

Brand	Intel
Model	MCS 51
Category	Microcontrollers
Language	English