Intel MCS 51 User Manual

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whichare generallyreferred to as the Lower 128,the
Whenaninstructionaccessesan internal locationabove
Upper 128,and SFR space.TheUpper 128bytesoccu-
address7FH, the CPU knowswhether the accessis to
pya
paralleladdressspacetotheSpecialFunctionReg-
theupper128bytesofdataRAMorto SFRspaceby
iaters.That means they have the same addresaesjbut
the addressingmodeused in the instruction. Instmc-
theyare physicallyseparatefrom
SFRspace.
tions
that use direct addressingaccessSFRspace.For
example,
The Lower 128 bytes of RAM are present in all
MCS-51devices.All of the bytesin the Lower128can
MOVOAOH,data
be accessedbyeither director indirectaddressing.The
lowest32byteaare groupedinto4 banksof 8 registers.
acceaaesthe SFRat locationOAOH(whichis P2). In-
Program instructions call out these regiaters as RO
stmctionsthat w indirectaddressingaeeessthe upper
through R7. Two bits in the Program Status Word
128bytesof data RAM. For example,
(PSW)selectwhichregisterbankis in use.This allows
moreMlcient use of cede space,sinceregisterinstmc-
NOV@RO,data
tions are shorter than instructionsthat use direct ad-
dressing.
6-4

Intel MCS 51 Specifications

General

Brand	Intel
Model	MCS 51
Category	Microcontrollers
Language	English