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Intel MCS 51 User Manual

Intel MCS 51
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in~.
83C152 HARDWARE DESCRIPTION
TFIFO - (85H)TFIFO is usedto accessa 3-byteFIFO
The addressesof the second128bytes of data memory
that containsthe transmissiondata for the GSC.
happen to overlapthe SFR addressee.The SFRSand
TSTAT - (OD8H)Contains the DMA SeMce bit
th~u memorylo&tionsare shownin Figure 2.2. This
(DMA), Transmit Enable bit (TEN), Transmit FIFO
meansthat internal &ta memoryspaceshavethe same
Not Full bit (TFNF), Transmit Done bit (TDN),
address es the SFR address. However, each type of
memoryis addresseddii%erently.Toaccess
data memo-
Transmit CollisionDetect bit (TCDT), Underrun
bit
(UR), No Acknowledgebit (NOACK), and the Re-
ry above 80H, indirecteddreaaingor the DMA chan-
nelsmust be used.To accessthe SFRS,direct address-
ceive Data Line Idle bit (LNI). This register is used
ingis used.Whendirectaddressingis used,the address
with both DMAend GSC.
is the sourceor destination,e.g. MOVA, IOH,moves
the contents of location IOH-into the “accmn
ulator.
Thegeneralpurposeflagbita(GFOand GF1)that exist
When indirect addressingis used, the address of the
on the 80C51BHare no longeravailableon the C152.
GFOhas been renamed GFIEN (GSC Flag Idle En-
destinetionor sourceexistswithinsnother register,e.g.
MOVA, @RO.This
instruction movesthe contentsof
able)end is usedto enableidle fill flags.AlsoGF1 has
been renamed XRCLK (External ReceiveClock En-
the memorylocationaddressedbyROinto the accumu-
lator. Directly addressingthe locations 80H to OFFH
able) end is used to enable the receiverto be clocked
externally.
will-s the SFRS.Anotherform ofindirectaddress-
ing is with the usc of StackPointer operations. If the
StackPointercontainsan addressand a PUSHor POP
2.1.2 DATAMEMORY
instruction is executed,indirectaddressingis actually
used. Directly accessingan unused SFR address will
Internal data memoryconsistsof256bytesas shownin
giveundefinedresults.
Figure 2.1. The tirst 128bytes are addressedexactly
likean 80C51BH,usingdirect addressing.
Physically,there are separate SFR memory and date
memoryspaces elloeatedon the chip. Sincethere are
separatespaces,the SFRSdo not diminishthe available
data memoryspace.
OFFH
(“)
OVERLAPPING
MEMORY
AOGRESSES
080H
(“)
(“)
SPECIALPUNC710NREOSTER
SPACE
02FH
Err AOORESSASLE
MEUOSYSPACE
020H
OIFH
REGISTERSANK3
017H
REGIS7ERSANK2
O1OH
RECFJERBANK1
O07H
REGISTERBANKO
OOOH
USEROATAMEMORYSPACE
270427-1
“NOTE:
Ueerdate
memoryaboveSOHmustbeaddressedindirectly.Using directaddressingabove80Hacceaeesthe Special
FunctionRegisters.
-. - . - . ..
.-
rlgure 2.1. Data MemO~ MafJ
7-7

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Intel MCS 51 Specifications

General IconGeneral
BrandIntel
ModelMCS 51
CategoryMicrocontrollers
LanguageEnglish

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