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83C152 HARDWARE DESCRIPTION
80Cf52JA/JC
83C152JA/JC
P1.6C 10
P1.7C 11
N.C,C 12
KErC 13
P3.OC 14
56
P3,1C 1s
P3.2C
16 54
3=
N.c.c
17
5s J
N,C.
P33C 18 S2 aN,c.
PSAC 19
s! 3N.C.
NC C 20
34 3N.C.
49 JN.C.
a 3 P2.7
47 3 P2.6
46 3P2.S
43 3P2.4
44 3 P2.3
...0 -.” . ..-..0-.”
. . . . . . . . . . . . . . . . .
0 ~ N n ~ ~ g.. * m ~ ~ J ~ 0 y N
2SS8SS>SRZS222 :=:
xx
270427-6
Figure 2.5B. PLCCPin Out
PI.6 c 10
PI.7 c 11
22ENC 12
Rsrrc 13
PSOc 14
P3,?c 15
P3.2c 36
FSOc 17
P3.3c 18
P3.4c 19
P5,1c m
P5.2C 21
P5,3C 22
P3.5c 23
PM c
24
P3.7c 25
NC. R 26
rww
80C152J6
80C152JD
E
30 P4.5
59 P4.6
58 ?4.7
56L
57 P3.S
1
55Au
54 F3rii
53 ma
52 P6.2
51 P6.7
50 ?2.4
49 P3.7
40 F-2.7
47 Pm
46 P2.5
45 P2.4
44 P2.3
270427-37
Figure 25C. PLCCPin Out
2.7 Pin Description
The rindeacriution for the ~51BHakoamhes tothe C152andis listed below.Chsngeahavebeenmsdeto the
dss&iptionsm’theyapply tothe
C152. ““
PIN DESCRIPTIO
Pin#
DIP
48
24
18-21,
25-28
NOTES:
2
3,33(2)
27-30,
34-37
I
Description
VSS-Circuit around.
Port fJ-Port Ois an 8-bitopendrainbi-directional1/0 port.Asan outputpart each
pincan sink8 LSlTL inputs.PortOpinsthat have 1swrittento them float,and in
thatstatecan be usedas high-impedanceinputs.
PortOisalsothe multiplexedlow-orderaddressanddata busduringaccessesto
externalprogrammemoryifEBENispulledlow.Duringaccessesto externalDate
Memory,PortOalwaysemitsthe low-orderaddressbyteandservesas the
multiplexeddata bus.inthese applicationsituses stronginternalpullupswhen
emitting 1s.
PodOalsooutputsthecodebytesduringprogramverification.ExternalPUIIUPSare
requiredduringprogramverification.
1. N.C. pins on PLCC package may be connected to internal die and should not be usad in customer applications.
2. It is recommended that both Pin 3 and Pin 33 be grounded for PLIX devicea.
7-14
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