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Intel MCS 51 User Manual

Intel MCS 51
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83C152 HARDWARE DESCRIPTION
3.2.4 CSMA/CDDATA
ENCODING
Manchesterencoding/deccdingis automaticallyselect-
edwhenthe usersoftwareselectsC3MA/CDtransmis-
sion mode (See Figure 3.3). In Manchester encoding
the valueof the bit is determined by the transition in
themiddleofthe bit time, a positivetransitionisdecod-
ed as a 1 and a negativetransition is decodedas a O.
The Addressand Info bytes are transmitted LSBfret.
The CRCis transmitted MSBfirst.
If the external1Xclockfatssre is chosenthe transmiss-
ion modeis alwaysNICZ(see Section3.5.11).Using
CSMA/CDwith the external clock optionis not sup-
portedbecausethe data needsreformattingfromNRZ
to Manchesterfor the receiverto beableto detect code
violationsandcollisions.
3.2.5
COLUSION DETECTION
TheGSChardwaredetectscollisionsbydetectingMan-
chester waveformviolationsat its GRXD pin. Three
kinds of waveformviolationsare detected: a missing
O-to-1transitionwhereonewasexpected,a l-to-otran-
sitionwherenone was expected,and a waveformthat
stayslow(or high)for too short a time.
Jitter Tolerance
A validManchester
wavefomrmusthavea transitionat
the midpointofany bit ceU,and mayhavea transition
at the edgeof any bit cd. Therefore transitions will
nominallybe separatedby either 1/2 bit-timeor 1bit-
time.
The GSCsamplesthe GRXD pinat the rate of 8 x the
bit rate. The sequenceof samplesfor the receivedbit
sequence001wouldnominallybe:
samples:11110 000:1 111 O00O:OO001 111 :
bitvalue: O :
o: 1“
:<-bit cell->: <-bit cell->: <-bit cell-> ~
The
samplingsystem allows a jitter tolerance of * 1
-tions that are 1/2 bit-timeapart, and
samplefor t
*2 samplesfor transitionsthat are 1bit-timeapart.
Narrow Pulses
A valid Manchesterwaveformmust stay high or low
for at least a half bit-timq nominally4 sample-times.
Jitter toleranceallowsa waveformwhichstayshighor
low for 3 sampls4mes to also be ansidered vafid.A
samplesequencewhichshowsa secondtransitiononly
1or 2 sample-timesafter the previoustransitionis con-
sidered to be the result of a collision.Thus, sample
sequencessuchas 0000110000and 111101111areinter-
preted as collisions.
The GSChardwarerecognizesthe collisionto haveoc-
curred within3/8 to 1/2 bit-timefollowingthe second
transition.
Missing O-to-1Transition
A O-to-1transitionis expectedto occurat thecenterof
any bit cell that begins
with O.If the previousl-to-o
transition
occurredat the bit cell edge,ajitter tolerance
of t 1 sample is allowed. Sample sequencessuch as
11114MO01111and 1111:OOOIM1lllare valid, where
“:” indicates a bit cell edge. SeqUenmsof the form
1111.
00@300XXXare interpretedas collisions.
For theaekinds of sequences,the GSC recognizesthe
collisionto have occurred within 1 to 1 1/8 bit-times
after the pnwiousl-to-Otransition.
If the previousl-to-Otransition occurredat the center
ofthe previousbit cell,a jitter toleranceof +2 samples
is allowed. Thus, sample sequences such as
11110000:00001111~d 1111OOOOO:OOOOO1111are
val-
id. Sequencesof the form 111100COO:
@XIOOOXXXare
interpretedas collisions.
For these kinds of sequences,the GSC recognize the
collisionto have occurred within 1 5/8 to 1 3/4 bit-
times after the previous l-to-Otransition.
Unexpected l-to-O Transition
If thelineisat a logic 1duringthe firsthalfofa bit cell,
then it is expectedto make a l-to-Otransition at the
midpointof the bit cell. If the transitionis missed,it is
assumedthat thisbit cellis the tlrst halfofan EOFtlsg
0:1:1:0:0:1:
MANCHESTER
,
Ii
El?
,
- 71ME-
,
270427-14
Figure 3.3. Manchester Encoding
7-23

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Intel MCS 51 Specifications

General IconGeneral
BrandIntel
ModelMCS 51
CategoryMicrocontrollers
LanguageEnglish

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