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Intel MCS 51 User Manual

Intel MCS 51
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83C152 HARDWARE DESCRIPTION
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MANCHESTER
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270427-25
Figure 3.12. Transmit Waveforms
Wheneverthe externalclockoptionis used,the format
of the transmitted and receiveddata is restricted to
NRZ encodingand the protocolis restricted to SDLC.
With external clock, the bit stuftlng/strippingis still
activewith SDLCprotocoL
3.5.12 Determining Reoeiver Errore
It is
possiblethat severalreceivererror bits will be set
in responseto a singlecause.The multipleerrors that
can occur are:
AE and CRCE IllSyboth be set when an alignment
error occurs due to a bad CRC caused by the rnis-
rdignedframe.
RCABT,AE, and CRCE may be set when an abort
occurs.
OVR,AE, and CRCEmaybe set whena overrunoc-
curs.
In order to determinethe correct cause of the error a
specificorder should be followedwhen examiningthe
error bits.This order is:
1)OVR
2) RCBAT
3)AE
4) CRCE
(AMSKO,AMSK1)in the C152.Thesefunctionwith
theGSCreceiveronly.The transmittedaddressis treat-
edlikeanyotherdata Theaddressistransmittedunder
softwarecontrolby placing the addressbyte(s) at the
proper location(usuallyfirst) in the sequenceof bytes
to be output in the outgoingpacket.
The C152can haveup to four different8-bitaddresses
or two different Id-bit addressesassignedto each sta-
tion.Whenusing16-bitaddressing,ADRO:ADR1form
one address and ADR2:ADR3 form the second ad-
dress.If the receiveris enabled,it looksfor a matching
addressafter everyBOF ilag is detected.As the data is
received,if the 8th (or 16th)bit does not match the
address recognitioncircui~, the rest of the frame is
ignoredandthesearchcontinuesfor anothertlag. If the
address doesmatch the addreas recognitioncircuitry,
the addressand all subsequentdata is passedinto the
receiveFIFO until the EOF flag or an error occurs.
The address is not stripped and is also passed to
RFIFO.
The addressmaskingregia~ AMSKOand AMSK1,
workin conjunctionwithADROandADR1respective-
ly to identify“don’tcare” bits. A 1in any poaitionin
the AMSKnregister makes the respectivebit in the
ADRn registerirrelevant.Thesecombinationscan then
be usedforform groupaddresses,If the maskingregis-
ters arefilledwithall 1s,the C152willreceiveall pack-
ets, which is called the promiscuousmode. If id-bit
addressingis ~ AMSKO:AMSK1form one id-bit
addressmask.
3.5.13 Addressing
Thereare
four 8-bitaddress registers(ADRO,ADR1,
ADR2, ADR3) and two 8-bit address mask registers
7-40

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Intel MCS 51 Specifications

General IconGeneral
BrandIntel
ModelMCS 51
CategoryMicrocontrollers
LanguageEnglish

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