Intel MCS 51 User Manual

i~.
83C152 HARDWARE DESCRIPTION
versionof the Hold/Hold Acknowledgefeature is se-
ea are done only through DMA operations, not by
lectedby
setting the control bit ARBin PCON.
MOVXinstructions.
The functionsof the ARE and REQ bits in PCON,
One CPU is pro-cd to be the Arbiter and the
then,are
other, to be the Requester. The ALE Switch selects
ARB
REQ Hold/Hold Acknowledge Logic
whichCPU’sALEsignalwillbedirectedto the address
latch. TheArbiter’sALE is selectedif HLDA is high,
o 0
Disabled
and the Requester’s
ALE is selectedif= is low.
o 1
C152 generates~, detectsHLDA
1 0
C152 detects~, generatesHLDA
1 1
Invalid
‘k~m-
4.3.3 USING
THEHOLD/HOLDACKNOWLEDGE
The ~~~ logic ordy affectsDMA opera-
tionwithexternalRAM and doesn’taffectother opera-
tionswithexternalRAM, such as MOVXinstruction.
Figure4.6 showsa system in which two 83C152Sare
sharinga dobal RAM. In this svstem.both CPUSare
,+DJ
270427-34
Figure 4.7. ALE Switch Select
execu~g ~om internal ROM. Neith~ CPU usea the
busexceptto accessthe shared RAM,andsuchaccess-
The ALE Switchlogiccsn be implementedby a single
74HCO0,as shownin Figure4.7.
L-kL
Ws
ALE
SE
tmmz
.-
-~
7
4
L
j
7
s
rP
AM
miim
ALE
5X352
REQ
270427-33
Figure 4.6. Two 83C152S Sharing External RAM
7-52

Intel MCS 51 Specifications

General

Brand	Intel
Model	MCS 51
Category	Microcontrollers
Language	English