Intel Stratix 10 User Manual

Document
Version
Changes
• Changed the following parameters in the "General, Datapath Options, and Common PMA Options"
table:
— Removed the Enable RS-FEC parameter
— Removed the Enable datapath and interface reconfiguration parameter
— Changed the values and description for the Transceiver mode parameter
• Added the following parameters to the "TX PMA Options" table:
— TX PMA clockout post divider
— TX PMA reference clock frequency
• Added the following parameters to the "RX PMA Options" table:
— RX PMA clockout post divider
— RX PMA reference clock frequency
• Added the "Reset Parameters" section.
• Added the "Dynamic Reconfiguration Parameters" section.
• Added the following ports to the "Port Information" table:
—
reconfig_waitrequest
—
reconfig_readdata
—
reconfig_writedata
—
reconfig_address
—
reconfig_read
—
reconfig_write
—
reconfig_reset
—
reconfig_clk
• Added the "Parallel Data" table.
2018.01.31 Initial release.
2. Implementing the Transceiver PHY Layer in Intel Stratix 10 Devices
UG-20056 | 2019.02.04
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10 E-Tile Transceiver PHY User Guide
55

Intel Stratix 10 Specifications

General

Brand	Intel
Model	Stratix 10
Category	Control Unit
Language	English