NXP Semiconductors LPC1769 - Instruction Width Selection; Example: Instruction Width Selection

UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 20 December 2013 660 of 841
NXP Semiconductors
UM10360
Chapter 34: Appendix: Cortex-M3 user guide
Section shows the use of a conditional instruction to find the absolute value of a number.
R0 = ABS(R1).
Section
shows the use of conditional instructions to update the value of R4 if the signed
values R0 is greater than R1 and R2 is greater than R3.
Example: Absolute value:
MOVS R0, R1 ; R0 = R1, setting flags
IT MI ; IT instruction for the negative condition
RSBMI R0, R1, #0 ; If negative, R0 = -R1
Example: Compare and update value: CMP R0, R1 ; Compare R0 and R1,
setting flags
ITT GT ; IT instruction for the two GT conditions
CMPGT R2, R3 ; If 'greater than', compare R2 and R3, setting flags
MOVGT R4, R5 ; If still 'greater than', do R4 = R5
34.2.3.8 Instruction width selection
There are many instructions that can generate either a 16-bit encoding or a 32-bit
encoding depending on the operands and destination register specified. For some of
these instructions, you can force a specific instruction size by using an instruction width
suffix. The
.W suffix forces a 32-bit instruction encoding. The .N suffix forces a 16-bit
instruction encoding.
If you specify an instruction width suffix and the assembler cannot generate an instruction
encoding of the requested width, it generates an error.
Remark: In some cases it might be necessary to specify the
.W suffix, for example if the
operand is the label of an instruction or literal data, as in the case of branch instructions.
This is because the assembler might not automatically generate the right size encoding.
To use an instruction width suffix, place it immediately after the instruction mnemonic and
condition code, if any. Section 34.2.3.8.1
shows instructions with the instruction width
suffix.
34.2.3.8.1 Example: Instruction width selection
BCS.W label ; creates a 32-bit instruction even for a short branch
ADDS.W R0, R0, R1 ; creates a 32-bit instruction even though the same
; operation can be done by a 16-bit instruction
HI C = 1 and Z = 0 Higher, unsigned >
LS C = 0 or Z = 1 Lower or same, unsigned 
GE N = V Greater than or equal, signed 
LT N = V Less than, signed <
GT Z = 0 and N = V Greater than, signed >
LE Z = 1 and N = V Less than or equal, signed 
AL Can have any
value
Always. This is the default when no suffix is specified.
Table 615. Condition code suffixes
Suffix Flags Meaning