UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 20 December 2013 688 of 841
NXP Semiconductors
UM10360
Chapter 34: Appendix: Cortex-M3 user guide
34.2.5.6 MOV and MVN
Move and Move NOT.
34.2.5.6.1 Syntax
MOV{S}{cond} Rd, Operand2
MOV{cond} Rd, #imm16
MVN{S}{cond} Rd, Operand2
where:
S is an optional suffix. If S is specified, the condition code flags are updated on the result
of the operation, see Section 34.2.3.7
.
cond is an optional condition code, see Section 34.2.3.7
.
Rd is the destination register.
Operand2 is a flexible second operand. See Flexible second operand on page 3-10for
details of the options.
imm16 is any value in the range 0-65535.
34.2.5.6.2 Operation
The
MOV
instruction copies the value of Operand2 into Rd.
When Operand2 in a
MOV
instruction is a register with a shift other than
LSL #0
, the
preferred syntax is the corresponding shift instruction:
•
ASR{S}{cond} Rd, Rm, #n
is the preferred syntax for
MOV{S}{cond} Rd, Rm, ASR #n
•
LSL{S}{cond} Rd, Rm, #n
is the preferred syntax for
MOV{S}{cond} Rd, Rm, LSL #n
n if !=
0
•
LSR{S}{cond} Rd, Rm, #n
is the preferred syntax for
MOV{S}{cond} Rd, Rm, LSR #n
•
ROR{S}{cond} Rd, Rm, #n
is the preferred syntax for
MOV{S}{cond} Rd, Rm, ROR #n
•
RRX{S}{cond} Rd, Rm
is the preferred syntax for
MOV{S}{cond} Rd, Rm, RRX
.
Also, the
MOV
instruction permits additional forms of Operand2 as synonyms for shift
instructions:
•
MOV{S}{cond} Rd, Rm, ASR Rs
is a synonym for
ASR{S}{cond} Rd, Rm, Rs
•
MOV{S}{cond} Rd, Rm, LSL Rs
is a synonym for
LSL{S}{cond} Rd, Rm, Rs
•
MOV{S}{cond} Rd, Rm, LSR Rs
is a synonym for
LSR{S}{cond} Rd, Rm, Rs
•
MOV{S}{cond} Rd, Rm, ROR Rs
is a synonym for
ROR{S}{cond} Rd, Rm, Rs
See Section 34.2.5.3.
The
MVN
instruction takes the value of Operand2, performs a bitwise logical NOT operation
on the value, and places the result into Rd.
Remark: The
MOVW
instruction provides the same function as
MOV
, but is restricted to using
the imm16 operand.
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