NXP Semiconductors LPC1769 - Interrupt Set-Pending Register 0 Register (ISPR0 - 0 Xe000 E200)

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User manual Rev. 3 — 19 December 2013 82 of 841
NXP Semiconductors
UM10360
Chapter 6: LPC176x/5x Nested Vectored Interrupt Controller (NVIC)
6.5.5 Interrupt Set-Pending Register 0 register (ISPR0 - 0xE000 E200)
The ISPR0 register allows setting the pending state of the first 32 peripheral interrupts, or
for reading the pending state of those interrupts. The remaining interrupts can have their
pending state set via the ISPR1 register (Section 6.5.6
). Clearing the pending state of
interrupts is done through the ICPR0 and ICPR1 registers (Section 6.5.7
and
Section 6.5.8
).
Table 56. Interrupt Set-Pending Register 0 register (ISPR0 - 0xE000 E200)
Bit Name Function
0 ISP_WDT Watchdog Timer Interrupt Pending set.
Write: writing 0 has no effect, writing 1 changes the interrupt state to pending.
Read: 0 indicates that the interrupt is not pending, 1 indicates that the interrupt is pending.
1 ISP_TIMER0 Timer 0 Interrupt Pending set. See functional description for bit 0.
2 ISP_TIMER1 Timer 1. Interrupt Pending set. See functional description for bit 0.
3 ISP_TIMER2 Timer 2 Interrupt Pending set. See functional description for bit 0.
4 ISP_TIMER3 Timer 3 Interrupt Pending set. See functional description for bit 0.
5 ISP_UART0 UART0 Interrupt Pending set. See functional description for bit 0.
6 ISP_UART1 UART1 Interrupt Pending set. See functional description for bit 0.
7 ISP_UART2 UART2 Interrupt Pending set. See functional description for bit 0.
8 ISP_UART3 UART3 Interrupt Pending set. See functional description for bit 0.
9 ISP_PWM PWM1 Interrupt Pending set. See functional description for bit 0.
10 ISP_I2C0 I
2
C0 Interrupt Pending set. See functional description for bit 0.
11 ISP_I2C1 I
2
C1 Interrupt Pending set. See functional description for bit 0.
12 ISP_I2C2 I
2
C2 Interrupt Pending set. See functional description for bit 0.
13 ISP_SPI SPI Interrupt Pending set. See functional description for bit 0.
14 ISP_SSP0 SSP0 Interrupt Pending set. See functional description for bit 0.
15 ISP_SSP1 SSP1 Interrupt Pending set. See functional description for bit 0.
16 ISP_PLL0 PLL0 (Main PLL) Interrupt Pending set. See functional description for bit 0.
17 ISP_RTC Real Time Clock (RTC) Interrupt Pending set. See functional description for bit 0.
18 ISP_EINT0 External Interrupt 0 Interrupt Pending set. See functional description for bit 0.
19 ISP_EINT1 External Interrupt 1 Interrupt Pending set. See functional description for bit 0.
20 ISP_EINT2 External Interrupt 2 Interrupt Pending set. See functional description for bit 0.
21 ISP_EINT3 External Interrupt 3 Interrupt Pending set. See functional description for bit 0.
22 ISP_ADC ADC Interrupt Pending set. See functional description for bit 0.
23 ISP_BOD BOD Interrupt Pending set. See functional description for bit 0.
24 ISP_USB USB Interrupt Pending set. See functional description for bit 0.
25 ISP_CAN CAN Interrupt Pending set. See functional description for bit 0.
26 ISP_DMA GPDMA Interrupt Pending set. See functional description for bit 0.
27 ISP_I2S I
2
S Interrupt Pending set. See functional description for bit 0.
28 ISP_ENET Ethernet Interrupt Pending set. See functional description for bit 0.
29 ISP_RIT Repetitive Interrupt Timer Interrupt Pending set. See functional description for bit 0.
30 ISP_MCPWM Motor Control PWM Interrupt Pending set. See functional description for bit 0.
31 ISP_QEI Quadrature Encoder Interface Interrupt Pending set. See functional description for bit 0.