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NXP Semiconductors LPC1769
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UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 19 December 2013 96 of 841
NXP Semiconductors
UM10360
Chapter 7: LPC176x/5x Pin configuration
Table 73. Pin description
Symbol LQFP
100
LQFP
80
Type Description
P0[0] to P0[31] I/O Port 0: Port 0 is a 32-bit I/O port with individual direction controls for each
bit. The operation of port 0 pins depends upon the pin function selected via
the pin connect block. Pins 12, 13, 14, and 31 of this port are not available.
P0[0] / RD1 /
TXD3 / SDA1
46 37 I/O
P0[0] — General purpose digital input/output pin.
I
RD1 — CAN1 receiver input.
O
TXD3 — Transmitter output for UART3.
I/O
SDA1 — I
2
C1 data input/output (this pin does not use a specialized I2C
pad, see Section 19.1
for details).
P0[1] / TD1 /
RXD3 / SCL1
47 38 I/O
P0[1] — General purpose digital input/output pin.
O
TD1 — CAN1 transmitter output.
I
RXD3 — Receiver input for UART3.
I/O
SCL1 — I
2
C1 clock input/output (this pin does not use a specialized I2C
pad, see Section 19.1
for details).
P0[2] / TXD0 /
AD0[7]
98 79 I/O
P0[2] — General purpose digital input/output pin. When configured as an
ADC input, digital section of the pad is disabled.
O
TXD0 — Transmitter output for UART0.
I
AD0[7] — A/D converter 0, input 7.
P0[3] / RXD0 /
AD0[6]
99 80 I/O
P0[3] — General purpose digital input/output pin. When configured as an
ADC input, digital section of the pad is disabled.
I
RXD0 — Receiver input for UART0.
I
AD0[6] — A/D converter 0, input 6.
P0[4] /
I2SRX_CLK /
RD2 / CAP2[0]
81 - I/O
P0[4] — General purpose digital input/output pin.
I/O
I2SRX_CLK — Receive Clock. It is driven by the master and received by
the slave. Corresponds to the signal SCK in the
I
2
S-bus specification.
I
RD2 — CAN2 receiver input.
I
CAP2[0] — Capture input for Timer 2, channel 0.
P0[5] / I2SRX_WS /
TD2 / CAP2[1]
80 - I/O
P0[5] — General purpose digital input/output pin.
I/O
I2SRX_WS — Receive Word Select. It is driven by the master and
received by the slave. Corresponds to the signal WS in the
I
2
S-bus
specification
.
O
TD2 — CAN2 transmitter output.
I
CAP2[1] — Capture input for Timer 2, channel 1.
P0[6] /
I2SRX_SDA /
SSEL1 / MAT2[0]
79 64 I/O
P0[6] — General purpose digital input/output pin.
I/O
I2SRX_SDA — Receive data. It is driven by the transmitter and read by
the receiver. Corresponds to the signal SD in the
I
2
S-bus specification.
I/O
SSEL1 — Slave Select for SSP1.
O
MAT2[0] — Match output for Timer 2, channel 0.
P0[7] /
I2STX_CLK /
SCK1 / MAT2[1]
78 63 I/O
P0[7] — General purpose digital input/output pin.
I/O
I2STX_CLK — Transmit Clock. It is driven by the master and received by
the slave. Corresponds to the signal SCK in the
I
2
S-bus specification.
I/O
SCK1 — Serial Clock for SSP1.
O
MAT2[1] — Match output for Timer 2, channel 1.

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