ST STM32WL55JC

Debug support (DBG) RM0453
1436/1454 RM0453 Rev 2
38.14.5 BPU CoreSight peripheral identity register 0 (BPU_PIDR0)
Address offset: 0xFE0
Reset value: 0x0000 000C
38.14.6 BPU CoreSight peripheral identity register 1 (BPU_PIDR1)
Address offset: 0xFE4
Reset value: 0x0000 00B0
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Res. Res. Res. Res. Res. Res. Res. Res. PARTNUM[7:0]
rrrrrrrr
Bits 31:8 Reserved, must be kept at reset value.
Bits 7:0 PARTNUM[7:0]: part number bits [7:0]
0x0C: BPU part number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Res. Res. Res. Res. Res. Res. Res. Res. JEP106ID[3:0] PARTNUM[11:8]
rrrrrrrr
Bits 31:8 Reserved, must be kept at reset value.
Bits 7:4 JEP106ID[3:0]: JEP106 identity code bits [3:0]
0xB: Arm
®
JEDEC code
Bits 3:0 PARTNUM[11:8]: part number bits [11:8]
0x0: BPU part number