Direct memory access controller (DMA) RM0453
478/1454 RM0453 Rev 2
Refer to Section 2.6 for the register boundary addresses.
0x084
DMA_CNDTR7
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
NDT[17:0]
Reset value 000000000000000000
0x088
DMA_CPAR7 PA[31:0]
Reset value 00000000000000000000000000000000
0x08C
DMA_CMAR7 MA[31:0]
Reset value 00000000000000000000000000000000
Table 81. DMA register map and reset values (continued)
Offset Register
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
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