Analog-to-digital converter (ADC) RM0453
552/1454 RM0453 Rev 2
When an overrun condition occurs, the ADC keeps operating and can continue to convert
unless the software decides to stop and reset the sequence by setting the ADSTP bit in the
ADC_CR register.
The OVR flag is cleared by software by writing 1 to it.
It is possible to configure if the data is preserved or overwritten when an overrun event
occurs by programming the OVRMOD bit in the ADC_CFGR1 register:
• OVRMOD = 0
– An overrun event preserves the data register from being overwritten: the old data
is maintained and the new conversion is discarded. If OVR remains at 1, further
conversions can be performed but the resulting data is discarded.
• OVRMOD = 1
– The data register is overwritten with the last conversion result and the previous
unread data is lost. If OVR remains at 1, further conversions can be performed
and the ADC_DR register always contains the data from the latest conversion.
Figure 72. Example of overrun (OVR)
MSv30343V3
RDY
EOC
EOS
CH0
CH1 CH2 CH0
D0 D1 D2
CH1 CH2 CH0 STOP
D0
OVR
RDY
D0 D1 D2 D0 D1 D2
ADC_DR read
access
OVERRUN
by S/W by H/W
triggered
ADC_DR
(OVRMOD=0)
ADSTP
ADC state
(2)
ADSTART
(1)
TRGx
(1)
ADC_DR
(OVRMOD=1)
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