Analog-to-digital converter (ADC) RM0453
550/1454 RM0453 Rev 2
Figure 69. Single conversions of a sequence, hardware trigger
1. EXTSEL = TRGx (over-frequency), EXTEN = 01 (rising edge), CONT = 0
2. CHSEL = 0xF, SCANDIR = 0, WAIT = 0, AUTOFF = 0
Figure 70. Continuous conversions of a sequence, hardware trigger
1. EXTSEL = TRGx, EXTEN = 10 (falling edge), CONT = 1
2. CHSEL = 0xF, SCANDIR = 0, WAIT = 0, AUTOFF = 0
MSv30340V2
CH1 CH1CH3 CH0 CH2
D0 D1 D2 D1 D2 D3D3
CH2
EOC
ADC_DR
ADC state
(2)
ADSTART
(1)
EOS
RDYRDY CH0 CH3
TRGx
(1)
RDY
D0
by H/W
ignored
by S/W
triggered
MSv30341V2
CH1 CH2
D0 D1 D2
CH0 CH2 CH0
D3 D0 D1 D2 D3
STOP
ADC_DR
ADSTP
by H/W
CH1 CH3
ignored
EOC
ADC state
(2)
ADSTART
(1)
EOS
RDYCH0 CH3
TRGx
(1)
RDY
by S/W
triggered
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