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ST STM32WL55JC User Manual

ST STM32WL55JC
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Page #1278 background image
Serial peripheral interface / integrated interchip sound (SPI/I2S) RM0453
1278/1454 RM0453 Rev 2
Figure 359. Master full-duplex communication in packed mode
Assumptions for master full-duplex communication in packed mode example:
Data size = 5 bit
Read/write FIFO is performed mostly by 16-bit access
FRXTH=0
If DMA is used:
Number of Tx frames to be transacted by DMA is set to 3
Number of Rx frames to be transacted by DMA is set to 3
PSIZE for both Tx and Rx DMA channel is set to 16-bit
LDMA_TX=1 and LDMA_RX=1
See also : Communication diagrams on page 1274 for details about common assumptions
and notes.
4 3 2 1
10
NSS
SCK
BSY
MOSI
5
SPE
TXE
00
11
11 00
FTLVL
DTx1-2
DTx3-4
01
10
00
10
00 00
RXNE
DRx1-2
DRx3-4
DRx5
FRLVL
DMA Tx TICF
DMA Rx TICF
11
2
3
4
5
Enable Tx/Rx DMA or interrupts
DMA or software control at Tx events
DMA or software control at Rx events
10
DTx5
10
7
4 3 2 1
5
4 3 2 1
5
4 3 2 1
5
4 3 2 1
5
DTx1-2 DTx3-4 DTx5
5 4 3 2
1
5 4 3 2
1
5 4 3 2
1
5 4 3 2
1 1
5 4 3 2
MISO
DRx1-2
DRx3-4 DRx5
01
FRTHX=1
01
00
01
8
3
MSv32125V2

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ST STM32WL55JC Specifications

General IconGeneral
SeriesSTM32WL
Speed48MHz
Flash Memory256 KB
RAM64 KB
Voltage - Supply (Vcc/Vdd)1.8 V ~ 3.6 V
RF Frequency150MHz ~ 960MHz
Data ConvertersA/D 12x12b; D/A 1x12b
ADC Channels12
DAC Channels1
Sub-GHz RadioYes
Core ProcessorARM Cortex-M4
ConnectivityI2C, SPI, UART
Oscillator TypeInternal
Operating Temperature-40°C ~ 85°C
Communication InterfacesI2C, SPI, USART
Wireless ConnectivityLoRa, Sigfox
Radio Frequency Range150MHz ~ 960MHz
PeripheralsDMA, POR, PWM, WDT

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