RM0453 Rev 2 375/1454
RM0453 Hardware semaphore (HSEM)
377
8.4.8 HSEM interrupt clear register (HSEM_KEYR)
Address offset: 0x144
Reset value: 0x0000 0000
Bits 31:16 KEY[15:0]: Semaphore clear key
This field can be written by software and is always read 0.
If this key value does not match HSEM_KEYR.KEY, semaphores are not affected.
If this key value matches HSEM_KEYR.KEY, all semaphores matching the COREID are
cleared to the free state.
Bits 15:13 Reserved, must be kept at reset value.
Bit 12 Reserved, must be kept at reset value.
Bits 11:8 COREID[3:0]: COREID of semaphores to be cleared
This field can be written by software and is always read 0.
This field indicates the COREID for which the semaphores are cleared when writing the
HSEM_CR.
Bits 7:0 Reserved, must be kept at reset value.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
KEY[15:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
1514131211109876543210
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
Bits 31:16 KEY[15:0]: Semaphore clear key
This field can be written and read by software.
Key value to match when clearing semaphores.
Bits 15:0 Reserved, must be kept at reset value.
To Next Page
Loading...
Need help?
General
