ST STM32WL55JC User Manual

RM0453 Rev 2 209/1454
RM0453 Sub-GHz radio (SUBGHZ)
217
5.10.7 Sub-GHz radio generic CRC polynomial LSB register
(SUBGHZ_GCRCPOLRL)
Address offset: 0x06BF
Reset value: 0x21
5.10.8 Sub-GHz radio generic synchronization word control register 7
(SUBGHZ_GSYNCR7)
Address offset: 0x06C0
Reset value: 0x97
5.10.9 Sub-GHz radio generic synchronization word control register 6
(SUBGHZ_GSYNCR6)
Address offset: 0x06C1
Reset value: 0x23
5.10.10 Sub-GHz radio generic synchronization word control register 5
(SUBGHZ_GSYNCR5)
Address offset: 0x06C2
Reset value: 0x52
76543210
CRCPOLI[7:0]
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Bits 7:0 CRCPOLI[7:0]: Generic packet CRC initial polynomial LSB bits [7:0]
These bits are used for CRC initialization.
76543210
SYNCWORD[63:56]
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Bits 7:0 SYNCWORD[63:56]: Eight byte of generic packet synchronization word
76543210
SYNCWORD[55:48]
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Bits 7:0 SYNCWORD[55:48]: Seventh byte of generic packet synchronization word
76543210
SYNCWORD[47:40]
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ST STM32WL55JC Specifications

General

Brand	ST
Model	STM32WL55JC
Category	Microcontrollers
Language	English