ST STM32WL55JC User Manual

RM0453 Rev 2 707/1454
RM0453 Public key accelerator (PKA)
721
24.4.8 Modular reduction
Modular reduction operation consists in the computation of the remainder of A divided by n.
Operation instructions are summarized in Table 153.
24.4.9 Arithmetic addition
Arithmetic addition operation consists in the computation of A + B. Operation instructions
are summarized in Table 154.
24.4.10 Arithmetic subtraction
Arithmetic subtraction operation consists in the following computations:
• If A ≥ B result equals A - B
• If A < B and M/32 residue is >0 result equals A + 2
int(M/32)*32+1
- B
• If A < B and M/32 residue is 0 result equals A + 2
int(M/32)*32
- B
Operation instructions are summarized in Table 155.
Table 153. Modular reduction
Parameters with direction Value (Note) Storage Size
IN
MODE 0x0D PKA_CR 6 bits
Operand length (In bits, not null) RAM@0x400
32 bits
Modulus length (In bits, 8 < value < 3136) RAM@0x404
Operand A (0 ≤ A < 2n < 2
3136
) RAM@0x8B4
ROSModulus value n (Odd integer only, n < 2
3136
)RAM@0xA44
OUT Result A mod n (0 < result < n) RAM@0xBD0
Table 154. Arithmetic addition
Parameters with direction Value (Note) Storage Size
IN
MODE 0x09 PKA_CR 6 bits
Operand length M (In bits, not null) RAM@0x404 32 bits
Operand A (0 ≤ < A < 2
M
) RAM@0x8B4
ROS
Operand B (0 ≤ < B < 2
M
)RAM@0xA44
OUT Result: A+B (0 ≤ result < 2
M+1
) RAM@0xBD0 ROS + 1
Table 155. Arithmetic subtraction
Parameters with direction Value (Note) Storage Size
IN
MODE 0x0A PKA_CR 6 bits
Operand length M (In bits, not null) RAM@0x404 32 bits
Operand A (0 ≤ < A < 2
M
) RAM@0x8B4
ROSOperand B (0 ≤ < B < 2
M
)RAM@0xA44
OUT Result: A-B (0 ≤ result < 2
M
)RAM@0xBD0

ST STM32WL55JC Specifications

General

Brand	ST
Model	STM32WL55JC
Category	Microcontrollers
Language	English