ST STM32WL55JC User Manual

RM0453 Rev 2 439/1454
RM0453 System configuration controller (SYSCFG)
444
11.2.12 SYSCFG CPU1 interrupt mask register 2 (SYSCFG_IMR2)
Address offset: 0x104
Reset value: 0x0000 0000
11.2.13 SYSCFG CPU2 interrupt mask register 1 (SYSCFG_C2IMR1)
Address offset: 0x108
Reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. PVDIM Res.
PVM3IM
Res. Res.
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1514131211109876543210
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
Bits 31:21 Reserved, must be kept at reset value.
Bit 20 PVDIM: PVD interrupt mask to CPU1
0: PVD interrupt forwarded to CPU1
1. PVD interrupt to CPU1 masked
Bit 19 Reserved, must be kept at reset value.
Bit 18 PVM3IM: PVM3 interrupt mask to CPU1
0: PVM3 interrupt forwarded to CPU1
1. PVM3 interrupt to CPU1 masked
Bits 17:0 Reserved, must be kept at reset value.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
EXTI15IM EXTI14IM EXTI13IM EXTI12IM
EXTI11IM
EXTI10IM
EXTI9IM EXTI8IM EXTI7IM EXTI6IM EXTI5IM EXTI4IM EXTI3IM EXTI2IM EXTI1IM
EXTI0IM
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Res. Res. DACIM ADCIM
COMPIM
AESIM
Res. PKAIM Res.
FLASHIM
RCCIM Res.
RTCWKUPIM
RTCSSRUIM
RTCALARMIM
RTCSTAMPTAMPLSECSSIM
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ST STM32WL55JC Specifications

General

Brand	ST
Model	STM32WL55JC
Category	Microcontrollers
Language	English