Analog-to-digital converter (ADC) RM0453
544/1454 RM0453 Rev 2
18.3.12 Starting conversions (ADSTART)
Software starts ADC conversions by setting ADSTART = 1.
When ADSTART is set, the conversion:
• Starts immediately if EXTEN = 00 (software trigger)
• At the next active edge of the selected hardware trigger if EXTEN ≠ 00
The ADSTART bit is also used to indicate whether an ADC operation is currently ongoing. It
is possible to re-configure the ADC while ADSTART = 0, indicating that the ADC is idle.
The ADSTART bit is cleared by hardware:
• In single mode with software trigger (CONT = 0, EXTEN = 00)
– At any end of conversion sequence (EOS = 1)
• In discontinuous mode with software trigger (CONT = 0, DISCEN = 1, EXTEN = 00)
– At end of conversion (EOC = 1)
• In all cases (CONT = x, EXTEN = XX)
– After execution of the ADSTP procedure invoked by software (see
Section 18.3.14: Stopping an ongoing conversion (ADSTP) on page 546)
Note: In continuous mode (CONT = 1), the ADSTART bit is not cleared by hardware when the
EOS flag is set because the sequence is automatically relaunched.
When hardware trigger is selected in single mode (CONT = 0 and EXTEN = 01), ADSTART
is not cleared by hardware when the EOS flag is set (except if DMAEN = 1 and
DMACFG = 0 in which case ADSTART is cleared at end of the DMA transfer). This avoids
the need for software having to set the ADSTART bit again and ensures the next trigger
event is not missed.
After changing channel selection configuration (by programming ADC_CHSELR register or
changing CHSELRMOD or SCANDIR), it is mandatory to wait until CCRDY flag is asserted
before asserting ADSTART, otherwise the value written to ADSTART is ignored.
To Next Page
Loading...
Need help?
General
