Analog-to-digital converter (ADC) RM0453
568/1454 RM0453 Rev 2
Analog watchdog 2 status bit is set AWD2 AWD2IE
Analog watchdog 3 status bit is set AWD3 AWD3IE
Channel Configuration Ready CCRDY CCRDYIE
End of sampling phase EOSMP EOSMPIE
Overrun OVR OVRIE
Table 109. ADC interrupts (continued)
Interrupt event Event flag Enable control bit
To Next Page
Loading...
