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Utax P-4532DN - Page 237

Utax P-4532DN
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8-10
PWBs Description for PWB
[CONFIDENTIAL]
38 GND - - Ground
39 LVU_SLEEP_N I DC0V/3.3V LVU energy-saving control
40 POWER_SW O DC0V/3.3V Detecting the power switch pressed
41 E2C_IRN O LVCMOS33 Engine
Interrupt
42 E2C_WKUP_BGD_N O LVCMOS33 Engine BGD return trigger
43 ENG_HLDN I 3.3V CMOS Hold to the engine
44 C2E_QUICK_START I LVCMOS33 Speed priority return notification
45 PVSYNC O LVCMOS33 VSYNC
46 GND - - Ground
47 P2C_WKUP_RDY O LVCMOS33 Detecting the panel key pressed
48 ENERGYSAVERKEY_N O LVCMOS33 OK key on the operation panel
49 C2P_RST_N I Panel reset signal
50 P2C_SDAT O LVCMOS33 Panel received data sjgnal
51 C2P_SDAT I LVCMOS33 Panel transmitted data signal
52 GND - - Ground
53 SDIF_SDCD O DC0V/3.3V Card detect signal
54 SDIF_INTA O DC0V/3.3V Interrupt signal
55 SDIF_CMD I DC0V/3.3V Command signal
56 BDN_D O 3.3V CMOS Beam Detect
57 SH2D I 3.3V CMOS Sample / hold signal 2
58 GND - - Ground
59 LDOUT_2_DN I LVDS
Video data 2
60 LDOUT_2_DP I LVDS
Video data 2
YC21 1 TH3 I Analog FUTH2 output signal
2 TH1 I Analog FUTH2 output signal
3 GND - - Ground
4 REARFANN O DC24V
Rear fan motorOn/Off
5 +24V0_F3 O DC24V Power source
YC22 1 +24V3_F2 O DC24V Power source
2 OPSDO O DC0V/3.3V (pulse) PF communication serial data signal
3 OPSDI I DC0V/3.3V (pulse) PF communication serial data signal
4 OPCLK O DC0V/3.3V (pulse) PF communication serial clock signal
5 OPRDYN I DC0V/3.3V Option communication ready signal
6 +3.3V3_F1 O DC3.3V Power source
7 GND - - Ground
8 OPSEL2 O DC0V/3.3V PF select signal
9 OPSEL1 O DC0V/3.3V PF select signal
10 OPSEL0 O DC0V/3.3V PF select signal
11 OPPAUSEN O DC0V/3.3V Paper stop signal
12 GND - - Ground
YC23 1 VBUS O DC5V Power source
2 UDATAN I/O LVDS USB data signal (-)
3 UDATAP I/O LVDS USB data signal (+)
4 GND - - Ground
YC26 1 +3.3V3_F2 O DC3.3V Power source
Connector Pins Signal I/O Voltage Description

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