Xilinx SelectIO 7 Series - Page 32

32 www.xilinx.com 7 Series FPGAs SelectIO Resources User Guide
UG471 (v1.10) May 8, 2018
Chapter 1: SelectIO Resources
X-Ref Target - Figure 1-1 4
Figure 1-14: SSTL DCI Usage Examples
ug471_c1_16_042413
SSTL18_I SSTL18_II
RR
2R
2R
R
2R
R
2R
2R
2R
2R
2R
Conventional
DCI Transmit
Conventional
Receive
Conventional
Transmit
DCI Receive
DCI Transmit
DCI Receive
Bidirectional
Reference
Resistor
Recommended
Z
0
VRN = VRP = 2R = 2Z
0
50Ω
VRN = VRP = 2R = 2Z
0
50Ω
N/A
Z
0
R
R
2R
2R
2R
2R
Z
0
Z
0
Z
0
Z
0
Z
0
Z
0
Z
0
7 Series FPGA
HP Bank DCI
7 Series FPGA
HP Bank DCI
7 Series FPGA
HP Bank DCI
7 Series FPGA
HP Bank DCI
7 Series FPGA
HP Bank DCI
7 Series FPGA
HP Bank DCI
7 Series FPGA
HP Bank DCI
7 Series FPGA
HP Bank DCI
7 Series FPGA
HP Bank DCI
Z
0
2R
2R
2R
2R
V
CCO
/2
V
CCO
/2
V
CCO
/2
V
CCO
/2
V
CCO
/2 V
CCO
/2
V
CCO
V
CCO
V
CCO
V
CCO
V
CCO
V
CCO
V
CCO
V
CCO
Notes:
1. Z
0
is the recommended PCB trace impedance.
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