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Abov MC97F60128 - Page 248

Abov MC97F60128
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248
MC97F60128
UARTnCR3 (UARTn Control Register 3) : 4062H/406AH/4072H (XSFR), Where n = 2, 3 and 4
7
6
5
4
3
2
1
0
-
LOOPSn
-
-
-
USBSn
UnTX8
UnRX8
-
R/W
-
-
-
R/W
R/W
R
Initial value : 00H
LOOPSn
Controls the Loop Back Mode of UARTn, for test mode
0
Normal operation
1
Loop Back mode
USBSn
Selects the length of stop bit.
0
1 Stop Bit
1
2 Stop Bit
UnTX8
The ninth bit of data frame in UARTn. Write this bit first before loading the UARTnDR
register
0
MSB (9
th
bit) to be transmitted is ‘0’
1
MSB (9
th
bit) to be transmitted is ‘1’
UnRX8
The ninth bit of data frame in UARTn. Read this bit first before reading the receive buffer
0
MSB (9
th
bit) received is ‘0’
1
MSB (9
th
bit) received is ‘1’

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