Chapter 17 597
W-CDMA Downlink Digital Modulation for Receiver Test
Configuring for Transmit Diversity and BERT
Configuring Signal Parameters
1. Press
Link Control > 5 > Enter.
This positions the cursor on the DPCH.
2. Press
PhyCH Setup > Ref Measure Setup > 64 kbps.
This selects the 64 kbps reference measurement channel (RMC) as shown in the stated 3GPP TS
standard and configures two dedicated channels (DCH, transport channels). If desired, you can adjust the
TFCI bits for the DPCH and set a secondary scramble code. Notice that Ref 64 is showing as the data
type for DPCH one.
3. Press the
Mode Setup hardkey to return to the first-level W-CDMA softkey menu.
Generating the Baseband Signals and Synchronizing the ESG Transmissions
1. Press the W-CDMA Off On softkey to On for both ESG one and two.
This step can be performed at anytime during the setup. The advantage of turning the format on before
setting up the signal, if you have a spectrum analyzer or some other measuring equipment connected, is
you can see the changes as they are made. However you may experience a slight delay in signal
processing while the ESG updates the W-CDMA signal with any changes that are made.
2. On ESG one, press
More (1 of 2) > Mlt ESG Sync Trigger.
The output signal for both ESGs are now synchronized and ready to be received by the user equipment
(UE).
NOTE If any signal parameters are changed after the W-CDMA format is turned on and the Mlt ESG
Sync Trigger
softkey is pressed, it may cause a loss of synchronization. You will need to press
the
Mlt ESG Sync Trigger softkey after any parameter change is applied to the signal to ensure
proper synchronization between ESG one and two.
Configuring the UE
Using the UE controller, configure the mobile for the call setup procedure to receive the combined ESG
signals, ensuring that the receiver frequency is set to the same as the ESGs.
The UE must be able to demodulate and decode the data from the ESG, and then send this data back to the
ESG for the BERT measurement. The return signal to the ESG must be a TTL or CMOS level signal.
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