Chapter 17 631
W-CDMA Downlink Digital Modulation for Receiver Test
Configuring Rear Panel Output Signals
PICH data (DRPS35) Assigns paging indicator channel (PICH) data to the
selected rear panel output port.
PICH TimeSlot pulse (DRPS36) Assigns the paging indicator channel (PICH) timeslot
pulse to the selected rear panel output port.
PICH 10ms FramePulse (DRPS37) Assigns the paging indicator (PICH) 10 millisecond
frame pulse to the selected rear panel output port.
P-CCPCH data-clk (DRPS38) Assigns the primary common control physical channel
(P-CCPCH) data clock to the selected rear panel output
port.
P-CCPCH data (DRPS39) Assigns the primary common control physical channel
(P-CCPCH) data to the selected rear panel output port.
DPCH ChipARB frame pulse (DRPS40) Assigns the DPCH chip ARB frame pulse data to the
selected rear panel output port.
DPCH TPC bits out (DRPS41) Assigns the DPCH transmit power control (TPC) bits
to the selected rear panel output port.
Mlt-ESG-Sync Trigger-Out (DRPS42) Used to instantly synchronize the output signals of
multiple ESGs while performing open-loop transmit
diversity testing.
Table 17-2 Downlink Rear Panel Output Signals
Signal Name Description