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Hitachi H8/500 Series - Section 4 Exception Handling; Overview; Types of Exception Handling and Their Priority

Hitachi H8/500 Series
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Section 4 Exception Handling
4.1 Overview
4.1.1 Types of Exception Handling and Their Priority
As indicated in table 4-1 (a) and (b), exception handling can be initiated by a reset, address error,
trace, interrupt, or instruction. An instruction initiates exception handling if the instruction is an
invalid instruction, a trap instruction, or a DIVXU instruction with zero divisor. Exception
handling begins with a hardware exception-handling sequence which prepares for the execution of
a user-coded software exception-handling routine.
There is a priority order among the different types of exceptions, as shown in table 4-1 (a). If two
or more exceptions occur simultaneously, they are handled in their order of priority. An
instruction exception cannot occur simultaneously with other types of exceptions.
Table 4-1 (a) Exceptions and Their Priority
Exception Start of Exception-
Type Source Detection Timing Handling Sequence
High Reset External RES Low-to-High transition Immediately
Address error Internal Instruction fetch or data read/write End of instruction
bus cycle execution
Trace Internal End of instruction execution, if End of instruction
T = “1” in status register execution
Interrupt External, End of instruction execution or end End of instruction
Low internal of exception-handling sequence execution
Table 4-1 (b) Instruction Exceptions
Exception Type Start of Exception-Handling Sequence
Invalid instruction Attempted execution of instruction with undefined code
Trap instruction Started by execution of trap instruction
Zero divide Attempted execution of DIVXU instruction with zero divisor
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