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Hitachi H8/500 Series - Section 16 RAM; Overview; Block Diagram; Block Diagram of On-Chip RAM

Hitachi H8/500 Series
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Section 16 RAM
16.1 Overview
The H8/532 includes 1K byte of on-chip static RAM, connected to the CPU by a 16-bit data bus.
Both byte and word access to the on-chip RAM are performed in two states, enabling rapid data
transfer and instruction execution.
The on-chip RAM is assigned to addresses H'FB80 to H'FF7F in the chip’s address space. A
RAM control register (RAMCR) can enable or disable the on-chip RAM, permitting these
addresses to be allocated to external memory instead, if so desired.
16.1.1 Block Diagram
Figure 16-1 shows the block diagram of the on-chip RAM.
Internal data bus (upper 8 bits)
Internal data bus (lower 8 bits)
On-chip RAM
Address
H'FB80
H'FB82
H'FF7E
RAMCR
Even addresses Odd addresses
RAMCR: RAM Control Register
Figure 16-1 Block Diagram of On-Chip RAM
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