Hitachi H8/500 Series - Effect of Changing Internal Clock Sources

Table 10-5 Effect of Changing Internal Clock Sources
No. Description Timing Chart
1Low → Low:
CKS1 and CKS0 are
rewritten while both
clock sources are Low.
2Low → High:
CKS1 and CKS0 are
rewritten while old
clock source is Low and
new clock source is High.
3 High → Low:
CKS1 and CKS0 are
rewritten while old
clock source is High and
new clock source is Low.
∗ The switching of clock sources is regarded as a falling edge that increments the FRC.
CKS rewrite
Old clock
source
New clock
source
FRC clock
pulse
FRC
N N + 1
Old clock
source
New clock
source
FRC clock
pulse
FRC N N + 1 N + 2
CKS rewrite
Old clock
source
New clock
source
FRC clock
pulse
FRC
N N + 1 N + 2
*
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