A transition to the software standby mode initializes the on-chip supporting modules, so any pins
of port 7 that were being used by an on-chip timer when the transition occurs revert to general-
purpose input or output, controlled by P7DDR and P7DR.
2. Port 7 Data Register (P7DR)—H'FF8E
P7DR is an 8-bit register containing the data for pins P77 to P70. When the CPU reads P7DR, for
output pins it reads the value in the P7DR latch, but for input pins, it obtains the pin status directly.
9.8.3 Pin Functions
The pin functions of port 7 are the same in all MCU operating modes. As figure 9-19 indicated,
these pins are used for input and output of on-chip timer signals as well as for general-purpose
input and output. For some pins, two or more functions can be enabled simultaneously.
P77 can be used either for general-purpose input/output, or as the output pin for the output
compare A signal (FTOA) from free-running timer 1.
P76 to P74 can be used either for general-purpose input/output, or as the output pins for the output
compare B signals (FTOB) from free-running timers 3 to 1. When used for general-purpose input
and output, they can also provide external clock input (FTCI) to the free-running counters. This
additional function is selected when the clock select 1 and 0 bits (CKS1 and CKS0) in the free-
running timer control registers are both set to “1.”
P73 to P71 function simultaneously as general-purpose input/output pins and as input pins for the
input capture signals (FTI) of free-running timers 3 to 1.
Bit 76543210
P7
7 P76 P75 P74 P73 P72 P71 P70
Initial value 00000000
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
169
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