Hitachi H8/500 Series - TCNT Write-Increment Contention

2. Changing the Clock Select Bits (CKS2 to CKS0): Software should stop the watchdog timer
(by clearing the TME bit to 0) before changing the value of the clock select bits. If the clock
select bits are modified while the watchdog timer is running, the timer count may be
incremented incorrectly.
Internal address bus
Internal write signal
TCNT clock pulse
ø
TCNT address
N M
Write cycle: CPU writes to TCNT
TCNT
Counter write data
T1 T2 T3
Figure 13-6 TCNT Write-Increment Contention
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