Hitachi H8/500 Series - Block Diagram; Block Diagram of 16-Bit Free-Running Timer

10.1.2. Block Diagram
Figure 10-1 shows a block diagram of one free-running timer channel.
ICI
OCIA
OCIB
FOVI
Interrupt signals
OCRA:
OCRB:
FRC:
ICR:
TCSR:
TCR:
Output Compare Register A
Output Compare Register B
Free Running Counter
Input Capture Register
Timer Control/Status Register
Timer Control Register
TCR
TCSR
ICR
OCRB
Comparator B
Capture
Compare-match B
Clear
Overflow
FRC
Comparator A
OCRA
Control
logic
FTOA
FTOB
FTI
FTCI
External clock Internal clock
ø/4
ø/8
ø/32
Clock
Clock select
Compare-match A
Module
data
bus
Internal
data bus
Bus interface
Figure 10-1 Block Diagram of 16-Bit Free-Running Timer
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