Table 6-4 lists the addresses of the entries in the DTC vector table for each interrupt.
Table 6-4 Addresses of DTC Vectors
DTC vector table
Address
m
m + 1
Address (H)
Address (L)
RAM DTC vector table
Register
information
(1) Minimum mode
Address
2m*
2 m + 1*
Don’t care
Don’t care
(2) Maximum mode
2 m + 2Address (H)
2 m + 3Address (L)
* Address 2m and 2m + 1 are not accessed at vector read.
Address of DTC Vector
Interrupt Minimum Mode Maximum Mode
IRQ
0 H'0080 - H'0081 H'0100 - H'0103
IRQ
1 H'0082 - H'0083 H'0104 - H'0107
16-Bit ICI H'0088 - H'0089 H'0110 - H'0113
free-running OCIA H'008A - H'008B H'0114 - H'0117
timer 1 OCIB H'008C - H'008D H'0118 - H'011B
(FRT1) FOVI — —
16-Bit ICI H'0090 - H'0091 H'0120 - H'0123
free-running OCIA H'0092 - H'0093 H'0124 - H'0127
timer 2 OCIB H'0094 - H'0095 H'0128 - H'012B
(FRT2) FOVI — —
16-Bit ICI H'0098 - H'0099 H'0130 - H'0133
free-running OCIA H'009A - H'009B H'0134 - H'0137
timer 3 OCIB H'009C - H'009D H'0138 - H'013B
(FRT3) FOVI — —
Figure 6-4 DTC Vector Table Entry
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