14.2.6 Serial Control Register (SCR)—H'FFDA
The SCR is an 8-bit readable/writable register that enables or disables various SCI functions. It is
initialized to H'0C at a reset and in the standby modes.
Bit 7—Transmit Interrupt Enable (TIE): This bit enables or disables the transmit-end interrupt
(TXI) requested when the transmit data register empty (TDRE) bit in the serial status register
(SSR) is set to 1.
Bit 7
TIE Description
0 The transmit-end interrupt request (TXI) is disabled. (Initial value)
1 The transmit-end interrupt request (TXI) is enabled.
Bit 6—Receive Interrupt Enable (RIE): This bit enables or disables the receive-end interrupt
(RXI) requested when the receive data register full (RDRF) bit in the serial status register (SSR) is
set to 1. It also enables and disables the receive-error interrupt (ERI) request.
Bit 6
RIE Description
0 The receive-end interrupt (RXI) and receive-error interrupt (ERI) (Initial value)
requests are disabled.
1 The receive-end interrupt (RXI) and receive-error interrupt (ERI) requests are enabled.
Bit 5—Transmit Enable (TE): This bit enables or disables the transmit function. When the
transmit function is enabled, the TXD pin is automatically used for output. When the transmit
function is disabled, the TXD pin can be used as a general-purpose I/O port.
Bit 5
TE Description
0 The transmit function is disabled. The TXD pin can be (Initial value)
used as a general-purpose I/O port.
1 The transmit function is enabled. The TXD pin is used for output.
Bit 76543210
TIE RIE TE RE — — CKE1 CKE0
Initial value 00001100
Read/Write R/W R/W R/W R/W — — R/W R/W
251
Downloaded from Elcodis.com electronic components distributor
To Next Page
Loading...
