9.6.2 Port 5 Registers
Register Configuration: Table 9-8 lists the registers of port 5.
Table 9-8 Port 5 Registers
Name Abbreviation Read/Write Initial Value Address
Port 5 data direction register P5DDR W H'00 H'FF88
Port 5 data register P5DR R/W H'00 H'FF8A
1. Port 5 Data Direction Register (P5DDR)—H'FF88
P5DDR is an 8-bit register that selects the direction of each pin in port 5.
Single-Chip Mode: A pin functions as an output pin if the corresponding bit in P5DDR is set
to “1,” and as an input pin if the bit is cleared to “0.”
P5DDR can be written but not read. An attempt to read this register does not cause an error,
but all bits are read as “1,” regardless of their true values.
At a reset and in the hardware standby mode, P5DDR is initialized to H'00, making all eight
pins input pins. P5DDR is not initialized in the software standby mode, so if a P5DDR bit is
set to “1” when the chip enters the software standby mode, the corresponding pin continues to
output the value in the port 5 data register.
Expanded Modes Using On-Chip ROM (Modes 2 and 4): If a “1” is set in P5DDR, the
corresponding pin is used for address output. If a “0” is set in P5DDR, the pin is used for
general-purpose input. P5DDR is initialized to H'00 at a reset and in the hardware standby
mode.
Expanded Modes Not Using On-Chip ROM (Modes 1 and 3): All bits of P5DDR are fixed
at “1” and cannot be modified.
Bit 76543210
P5
7DDR P56DDR P55DDR P54DDR P53DDR P52DDR P51DDR P50DDR
Initial value 00000000
Read/Write WWWWWWWW
158
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