Hitachi H8/500 Series - Block Diagram; Interrupt Controller Block Diagram

5.1.2 Block Diagram
Figure 5-1 shows the block configuration of the interrupt controller.
IRQ0
IRQ1
FRT1
FRT2
FRT3
8 bits timer
SCI
A/D converter
NMI
Interrupt
request
signals
from
modules
Interrupt controller
NMI
request
Interrupt
request
DTC
request
Com- parator
Priority decision
IPRA to IPRD
DTEA to DTED
I 2 I 1 I 0 SR (CPU)
FRT:
SCI:
SR:
IPR:
DTE:
16 Bits Free Running Timer
Serial Communication Interface
Status Register
Interrupt Priority Register
Data Transfer Enable Register
Figure 5-1 Interrupt Controller Block Diagram
98
Downloaded from Elcodis.com electronic components distributor