Hitachi H8/500 Series - Operation in each Wait Mode; Programmable Wait Mode; Wait Modes

7.3 Operation in Each Wait Mode
Table 7-2 summarizes the operation of the three wait modes.
Table 7-2 Wait Modes
WAIT Insertion Number of Wait
Mode Pin Function Conditions States Inserted
Programmable Disabled Inserted on access to 1 to 3 wait states are inserted, as
wait mode an off-chip address specified by bits WC0 and WC1.
WMS1 = “0”
WMS0 = “0”
Pin wait mode Enabled Inserted on access to 0 to 3 wait states are inserted, as
WMS1 = “1” an off-chip address specified by bits WC0 and WC1,
WMS0 = “0” plus additional wait states while the
WAIT pin is held Low.
Pin auto-wait Enabled Inserted on access to 1 to 3 wait states are inserted, as
mode an off-chip address if specified by bits WC0 and WC1.
WMS1 = “1” the WAIT pin is Low
WMS0 = “1”
7.3.1 Programmable Wait Mode
The programmable wait mode is selected when WMS1 = “0” and WMS0 = “0.”
Whenever the CPU or DTC accesses an off-chip address, the number of wait states set in bits
WC1 and WC0 are inserted. The WAIT pin is not used for wait control; it is available as an I/O
pin.
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