Hitachi H8/500 Series - Flowchart of Data Transfer Cycle

INT Interrupt
DTC interrupt?
N
Y
DTC
Read DTC vector
Read transfer mode
Read source address
Read data
Source address
increment mode?
N
Y
Read destination address
Write data
Destination address
increment mode?
N
Y
Increment source address (+1 or +2)
Write source address
Write destination address
Increment destination address
(+1 or +2)
Read DTCR
DTCR DTCR
→
Write DTCR
DTCR = 0?
Y
N
DTC END
CPU
Save PC and SR
Read vector
Read address from
vector table
Start executing
interrupt-handling
routine at that
address.
Figure 6-2 Flowchart of Data Transfer Cycle
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