10-11 Square-Wave Output (Example) ····················································································200
10-12 FRC Write-Clear Contention ·························································································201
10-13 FRC Write-Increment Contention ·················································································202
10-14 Contention between OCR Write and Compare-Match ··················································203
11-1 Block Diagram of 8-Bit Timer ·······················································································208
11-2 Count Timing for External Clock Input ·········································································215
11-3 Setting of Compare-Match Flags ···················································································216
11-4 Timing of Timer Output ·································································································216
11-5 Timing of Compare-Match Clear ··················································································217
11-6 Timing of External Reset ·······························································································217
11-7 Setting of Overflow Flag (OVF) ····················································································218
11-8 Example of Pulse Output ·······························································································219
11-9 TCNT Write-Clear Contention ······················································································220
11-10 TCNT Write-Increment Contention ··············································································221
11-11 Contention between TCOR Write and Compare-Match ···············································222
12-1 Block Diagram of PWM Timer ·····················································································228
12-2 PWM Timing ·················································································································233
13-1 Block Diagram of Timer Counter ··················································································236
13-2 Writing to TCNT and TCSR ··························································································239
13-3 Operation in Watchdog Timer Mode ·············································································241
13-4 Operation in Interval Timer Mode ·················································································242
13-5 Setting of OVF Bit ·········································································································243
13-6 TCNT Write-Increment Contention ··············································································244
14-1 Block Diagram of Serial Communication Interface ······················································246
14-2 Data Format in Asynchronous Mode ·············································································260
14-3 Phase Relationship between Clock Output and Transmit Data ·····································261
14-4 Data Format in Synchronous Mode ···············································································265
14-5 Sampling Timing (Asynchronous Mode) ······································································271
15-1 Block Diagram of A/D Converter ··················································································274
15-2 Read Access to A/D Data Register (When Register Contains H'AA40) ·······················280
15-3 A/D Operation in Single Mode (When Channel 1 is Selected) ·····································283
15-4 A/D Operation in Scan Mode (When Channels 0 to 2 are Selected) ·····························286
15-5 A/D Conversion Timing ·································································································288
16-1 Block Diagram of On-Chip RAM ·················································································291
17-1 Block Diagram of On-Chip ROM ·················································································296
17-2 Socket Adapter Pin Arrangements ·················································································298
17-3 Memory Map in PROM Mode ·······················································································299
17-4 High-Speed Programming Flowchart ············································································300
17-5 PROM Write/Verify Timing ··························································································302
17-6 Recommended Screening Procedure ·············································································303
18-1 NMI Timing of Software Standby Mode (Application Example) ·································311
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