Hitachi H8/500 Series - Page 332

Table 20-4 Bus Timing (cont)
6MHz 8MHz 10MHz Measurement
Item Symbol Min Max Min Max Min Max Unit Conditions
Address setup time 2 t
AS2 105 – 80 – 65 – ns See figure 20-4
Read data setup time t
RDS 60 – 50 – 40 – ns
Read data hold time t
RDH 0 – 0–0–ns
Read data access time t
ACC – 280 – 190 – 160 ns
Write data delay time t
WDD –70–65–65ns
Write data setup time t
WDS 30 – 15 – 10 – ns
Write data hold time t
WDH 30 – 25 – 20 – ns
Wait setup time t
WTS 40 – 40 – 40 – ns See figure 20-5
Wait hold time t
WTH 10 – 10 – 10 – ns
Bus request setup time t
BRQS 40 – 40 – 40 – ns See figure 20-10
Bus acknowledge delay time 1 t
BACD1 –70–60–55ns
Bus acknowledge delay time 2 t
BACD2 –70–60–55ns
Bus floating delay time t
BZD –tBACD1 –tBACD1 –tBACD1 ns
E clock delay time t
ED – 20 – 15 – 15 ns See figure 20-
11
E clock rise time t
Er – 15 – 15 – 15 ns
E clock fall time t
Ef –15–15–15ns
Read data hold time t
RDHE 0 – 0 – 0 – ns See figure 20-6
(E clock sync)
Write data hold time t
WDHE 50 – 40 – 30 – ns
(E clock sync)
323
Downloaded from Elcodis.com electronic components distributor