• register list: A byte in which bits indicate general registers as follows
• #VEC: Four bits designating a vector number from 0 to 15. The vector numbers correspond to
addresses of entries in the exception vector table as follows:
Vector Address Vector Address
#VEC Minimum Mode Maximum Mode #VEC Minimum Mode Maximum Mode
0 H'0020 – H'0021 H'0040 – H'0043 8 H'0030 – H'0031 H'0060 – H'0063
1 H'0022 – H'0023 H'0044 – H'0047 9 H'0032 – H'0033 H'0064 – H'0067
2 H'0024 – H'0025 H'0048 – H'004B 10 H'0034 – H'0035 H'0068 – H'006B
3 H'0026 – H'0027 H'004C – H'004F 11 H'0036 – H'0037 H'006C – H'006F
4 H'0028 – H'0029 H'0050 – H'0053 12 H'0038 – H'0039 H'0070 – H'0073
5 H'002A – H'002B H'0054 – H'0057 13 H'003A – H'003B H'0074 – H'0077
6 H'002C – H'002D H'0058 – H'005B 14 H'003C – H'003D H'0078 – H'007B
7 H'002E – H'002F H'005C – H'005F 15 H'003E – H'003F H'007C – H'007F
• Examples of machine-language coding
Example 1: ADD:G.B @R0, R1
EA Field OP Field
Table A-1 (a) 1101Szrrr 00100r
drdrd
Machine code 11010000 00100 0 0 1
H'D021
Example 2: ADD:G.W @H'11:8, R1
EA Field OP Field
Table A-1 (a) 0000Sz101 00010001 00100r
drdrd
Machine code 0000 1 101 00010001 00100 0 0 1
H'0D1121
Bit76543210
R7 R6 R5 R4 R3 R2 R1 R0
345
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