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Hitachi H8/500 Series - Page 403

Hitachi H8/500 Series
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BRR—Bit Rate Register H'FFD9 SCI
Bit 76543210
Initial value 11111111
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Constant that determines the baud rate
SCR—Serial Control Register H'FFDA SCI
Bit 76543210
TIE RIE TE RE CKE1 CKE0
Initial value 00001100
Read/Write R/W R/W R/W R/W R/W R/W
Clock Enable 0
0 SCK pin is NOT USED.
1 SCK pin is used for output.
Clock Enable 1
0 Internal clock
1 External clock, input at SCK pin
Receive Enable
0 Receive disabled
1 Receive enabled
Transmit Enable
0 Transmit disabled
1 Transmit enabled
Receive Interrupt Enable
0 Receive interrupt request (RXI) is disabled.
1 Receive interrupt request (RXI) is enabled.
Transmit Interrupt Enable
0 Transmit interrupt request (TXI) is disabled.
1 Transmit interrupt request (TXI) is enabled.
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