Hitachi H8/500 Series - Page 420

Table C-1 (f) Port 1 Port Read (Pins P15, P16)
Setting Port Read Data
IRQ
0E
or = 1 Pin value
IRQ
1E
IRQ
0E DDR = 0 Pin value
or = 0
IRQ
1E DDR = 1 DR value
RP1
IRQ , IRQ to CPU
P1
n
IRQ E
or
IRQ E
Q
Port 1 control register,
bits 5 and 6
WP1
C
R
QD
P1 DR
n
C
R
QD
P1 DDR
n
Reset
Reset
WP1D:
WP1:
RP1:
n:
Write to P1DDR
Write to Port 1
Read Port 1
5 or 6
Internal data bus (PDB13, PDB14)
WP1D
0
1
01
Figure C-1 (f) Schematic Diagram of Port 1, Pins P15 and P16
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