Intel Stratix 10 User Manual

Address Name Description Reset
0x104 tx_aib_dsk_status Status fields for TX Deskew 0x0000 0000
0x108 rsfec_debug_cfg Extra config/debug on fec_clock 0x0000 0000
0x120 rsfec_lane_tx_stat_0 RS-FEC per lane TX status 0x0000 0000
0x124 rsfec_lane_tx_stat_1
0x128 rsfec_lane_tx_stat_2
0x12C rsfec_lane_tx_stat_3
0x130 rsfec_lane_tx_hold_0 RS-FEC per lane TX status hold 0x0000 0000
0x134 rsfec_lane_tx_hold_1
0x138 rsfec_lane_tx_hold_2
0x13C rsfec_lane_tx_hold_3
0x140 rsfec_lane_tx_inten_0 RS-FEC per lane TX status hold interrupt - set to 1 to enable
rsfec_lane_tx lane interrupt
0x0000 0000
0x144 rsfec_lane_tx_inten_1
0x148 rsfec_lane_tx_inten_2
0x14C rsfec_lane_tx_inten_3
0x150 rsfec_lane_rx_stat_0 RS-FEC per lane RX status 0x0000 0000
0x154 rsfec_lane_rx_stat_1
0x158 rsfec_lane_rx_stat_2
0x15C rsfec_lane_rx_stat_3
0x160 rsfec_lane_rx_hold_0 RS-FEC per lane RX status hold 0x0000 0000
0x164 rsfec_lane_rx_hold_1
0x168 rsfec_lane_rx_hold_2
0x16C rsfec_lane_rx_hold_3
0x170 rsfec_lane_rx_inten_0 RS-FEC per lane RX status hold interrupt - set to 1 to enable
rsfec_lane_rx lane interrupt
0x0000 0000
0x174 rsfec_lane_rx_inten_1
0x178 rsfec_lane_rx_inten_2
0x17C rsfec_lane_rx_inten_3
0x180 rsfec_lanes_rx_stat RS-FEC combined lanes RX status 0x0000 0000
0x188 rsfec_lanes_rx_hold RS-FEC combined lanes RX hold status 0x0000 0000
0x18C rsfec_lanes_rx_inten RS-FEC combined lanes RX interrupt enable - set to 1 to enable
rsfec_lanes RX lane interrupt
0x0000 0000
0x1A0 rsfec_ln_mapping_rx_0 RS-FEC FEC lane mapping 0x0000 0000
0x1A4 rsfec_ln_mapping_rx_1
0x1A8 rsfec_ln_mapping_rx_2
0x1AC rsfec_ln_mapping_rx_3
0x1B0 rsfec_ln_skew_rx_0 RS-FEC lane skew 0x0000 0000
0x1B4 rsfec_ln_skew_rx_1
continued...
9. Register Map
UG-20056 | 2019.02.04
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10 E-Tile Transceiver PHY User Guide
191

Intel Stratix 10 Specifications

General

Brand	Intel
Model	Stratix 10
Category	Control Unit
Language	English