Intel Stratix 10 User Manual

The ATTN/PRE/POST taps can be dynamically changed via the Avalon-MM interface.
For more details on PMA attribute support and programming, refer to PMA/PCS
Avalon-MM Register Map and PMA Attribute Codes to configure these parameters.
Related Information
• PMA Register Map on page 165
• PMA Attribute Codes on page 170
• PAM4—Transmitter Equalization Tool
• NRZ—Transmitter Equalization Tool
3.1.1.2. Gray Encoder/Precoder
PAM4 patterns generated in PAM4 mode are gray encoded by default. The encoding is
as follows:
Table 27. Gray Encoding
Linear Gray
00 00
01 01
10 11
11 10
The transmitter also includes a precoder that you can optionally enable for both PAM4
and NRZ signals. Once you turn it on, it performs 1/(1+D) encoding on all data bits
until you disable it.
Note: More details about the gray encoder and precoder will be available in a future release
of this document.
3.1.1.3. Serializer
The serializer converts the received parallel data into a serial data stream. The
channel serializer supports the following serialization factors: 16, 20, 32, 40, and 64.
The serializer is hard-coded to LSB first (in both the TX and RX directions).
Figure 34. Serializer
3. Intel Stratix 10 E-Tile Transceiver PHY Architecture
UG-20056 | 2019.02.04
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Intel Stratix 10 Specifications

General

Brand	Intel
Model	Stratix 10
Category	Control Unit
Language	English