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RFL Electronics IMUX 2000 - Page 383

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Because RFL and Hubbell® have a policy of continuous product improvement, we reserve the right to change designs and specications without notice.
RFL DS-562I RFL Electronics Inc.
June 14, 2007 29 (973)
334-3100
IMUX 2000 MULTIPLEXER AND RFL 9745 (RS-449)
Interfacing an IMUX 2000 with an RFL 9745 can be accomplished as follows:
A. The programmable jumpers on the 9745 RS-449 I/O shall be positioned as follows:
J1 (Send Timing): “Invert” Position
J2 (Receive Timing): “Invert” Position
B. The configuration of the IMUX 2000 RS-449 Channel Card shall be as follows:
1. DS-562I with MA-406IA I/O
MA-406IA I/O: J2 jumpers in DCE mode
J3 in any position
DS-562I, Switch SW4-2 (Receive Clock Polarity): Normal - ON (Right)
DS-562I, Switch SW4-3 (Transmit Clock Polarity): Normal - ON (Right)
2. DS-562I with MA-600 short haul fiber I/O
MA-600 I/O: No jumpers to set
DS-562I, Switch SW4-2 (Receive Clock Polarity): Normal - ON (Right)
DS-562I, Switch SW4-3 (Transmit Clock Polarity): Normal - ON (Right)
3. DS-562B with MA-406 I/O
MA-406 I/O: No jumpers to set
DS-562B, J1 (Send Timing Clock): Normal - Left (Middle and Front Posts)
DS-562B, J5 (Timing Mode): Internal - UP (Upper and Middle Posts)
C. Confirm Clock and Data Transitions to Insure Proper System Operation as follows:
1. RFL 9745 RS-449 I/O: The positive edge of the RxClock (TP4 or RT) must be in the center of
the RxData bit (TP2 or RD).
2. IMUX 2000: DS-562I - The positive edge of the TxClock (TP3) must be in the
center of the TxData bit (TP1).
DS-562B - The positive edge of the TxClock (U30-Pin 3) must be in
the center of the TxData bit (U30-Pin 2).

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