ST STM32WL55JC - Page 1257

RM0453 Rev 2 1257/1454
RM0453 Low-power universal asynchronous receiver transmitter (LPUART)
1257
Refer to Section 2.6: Memory organization for the register boundary addresses.
0x2C
LPUART_
PRESC
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
PRESCALER[3:0]
Reset value 0000
Table 254. LPUART register map and reset values (continued)
Offset
Register
name
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12
11
10
9 8 7 6 5 4 3 2 1 0