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Debug support (DBG) RM0453

1370/1454 RM0453 Rev 2

CTI CoreSight peripheral identity register 0 (CTI_PIDR0)

Address offset: 0xFE0

Reset value: 0x0000 0006

CTI CoreSight peripheral identity register 1 (CTI_PIDR1)

Address offset: 0xFE4

Reset value: 0x0000 00B9

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.

1514131211109876543210

Res. Res. Res. Res. Res. Res. Res. Res. PARTNUM[7:0]

rrrrrrrr

Bits 31:8 Reserved, must be kept at reset value.

Bits 7:0 PARTNUM[7:0]: part number bits [7:0]

0x06: CTI part number

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.

1514131211109876543210

Res. Res. Res. Res. Res. Res. Res. Res. JEP106ID[3:0] PARTNUM[11:8]

rrrrrrrr

Bits 31:8 Reserved, must be kept at reset value.

Bits 7:4 JEP106ID[3:0]: JEP106 identity code bits [3:0]

0xB: Arm

JEDEC code

Bits 3:0 PARTNUM[11:8]: part number bits [11:8]

0x9: CTI part number

ST STM32WL55JC User Manual

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